[][src]Trait stm32f103xx_hal::pwm2::PwmTrait

pub trait PwmTrait<TIM, BUS, REGISTERBLOCK, MAPPING>: Sized where
    MAPPING: TimChannelsMapping<TIM>,
    REGISTERBLOCK: TimRegisterType
{ fn enable_and_reset_tim(&self, apb: &mut BUS);
fn configure_pin_mapping(&self, mapr: &mut MAPR);
fn get_register_block<'a>() -> &'a REGISTERBLOCK; fn create_pwm(
        &self,
        clocks: Clocks,
        _pins: MAPPING,
        apb: &mut BUS,
        mapr: &mut MAPR
    ) -> PwmTimer<TIM, BUS, REGISTERBLOCK, MAPPING> { ... }
fn get_tim_clock_freq(clocks: Clocks) -> Hertz { ... }
fn write_ccer(ccer_bit: u8, value: bool) { ... }
fn get_period(clock_freq: u32) -> u32 { ... } }

Required methods

fn enable_and_reset_tim(&self, apb: &mut BUS)

fn configure_pin_mapping(&self, mapr: &mut MAPR)

fn get_register_block<'a>() -> &'a REGISTERBLOCK

Loading content...

Provided methods

fn create_pwm(
    &self,
    clocks: Clocks,
    _pins: MAPPING,
    apb: &mut BUS,
    mapr: &mut MAPR
) -> PwmTimer<TIM, BUS, REGISTERBLOCK, MAPPING>

fn get_tim_clock_freq(clocks: Clocks) -> Hertz

fn write_ccer(ccer_bit: u8, value: bool)

fn get_period(clock_freq: u32) -> u32

Loading content...

Implementations on Foreign Types

impl<T> PwmTrait<TIM1, APB2, RegisterBlock, T> for TIM1 where
    T: TimChannelsMapping<TIM1>, 
[src]

fn create_pwm(
    &self,
    clocks: Clocks,
    _pins: MAPPING,
    apb: &mut BUS,
    mapr: &mut MAPR
) -> PwmTimer<TIM, BUS, REGISTERBLOCK, MAPPING>
[src]

fn write_ccer(ccer_bit: u8, value: bool)[src]

fn get_period(clock_freq: u32) -> u32[src]

impl<T> PwmTrait<TIM2, APB1, RegisterBlock, T> for TIM2 where
    T: TimChannelsMapping<TIM2>, 
[src]

fn create_pwm(
    &self,
    clocks: Clocks,
    _pins: MAPPING,
    apb: &mut BUS,
    mapr: &mut MAPR
) -> PwmTimer<TIM, BUS, REGISTERBLOCK, MAPPING>
[src]

fn get_tim_clock_freq(clocks: Clocks) -> Hertz[src]

fn write_ccer(ccer_bit: u8, value: bool)[src]

fn get_period(clock_freq: u32) -> u32[src]

impl<T> PwmTrait<TIM3, APB1, RegisterBlock, T> for TIM3 where
    T: TimChannelsMapping<TIM3>, 
[src]

fn create_pwm(
    &self,
    clocks: Clocks,
    _pins: MAPPING,
    apb: &mut BUS,
    mapr: &mut MAPR
) -> PwmTimer<TIM, BUS, REGISTERBLOCK, MAPPING>
[src]

fn get_tim_clock_freq(clocks: Clocks) -> Hertz[src]

fn write_ccer(ccer_bit: u8, value: bool)[src]

fn get_period(clock_freq: u32) -> u32[src]

impl<T> PwmTrait<TIM4, APB1, RegisterBlock, T> for TIM4 where
    T: TimChannelsMapping<TIM4>, 
[src]

fn create_pwm(
    &self,
    clocks: Clocks,
    _pins: MAPPING,
    apb: &mut BUS,
    mapr: &mut MAPR
) -> PwmTimer<TIM, BUS, REGISTERBLOCK, MAPPING>
[src]

fn get_tim_clock_freq(clocks: Clocks) -> Hertz[src]

fn write_ccer(ccer_bit: u8, value: bool)[src]

fn get_period(clock_freq: u32) -> u32[src]

Loading content...

Implementors

Loading content...