[−][src]Module stm32f103xx::dac
Digital to analog converter
Modules
| cr | Control register (DAC_CR) |
| dhr8rd | DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD), Bits 31:16 Reserved |
| dhr12rd | Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12 Reserved |
| dhr12ld | DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 Reserved |
| dhr12l1 | DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1) |
| dhr12l2 | DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2) |
| dhr12r1 | DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1) |
| dhr12r2 | DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2) |
| dhr8r1 | DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1) |
| dhr8r2 | DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2) |
| dor1 | DAC channel1 data output register (DAC_DOR1) |
| dor2 | DAC channel2 data output register (DAC_DOR2) |
| swtrigr | DAC software trigger register (DAC_SWTRIGR) |
Structs
| CR | Control register (DAC_CR) |
| DHR8RD | DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD), Bits 31:16 Reserved |
| DHR12RD | Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12 Reserved |
| DHR12LD | DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 Reserved |
| DHR12L1 | DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1) |
| DHR12L2 | DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2) |
| DHR12R1 | DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1) |
| DHR12R2 | DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2) |
| DHR8R1 | DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1) |
| DHR8R2 | DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2) |
| DOR1 | DAC channel1 data output register (DAC_DOR1) |
| DOR2 | DAC channel2 data output register (DAC_DOR2) |
| RegisterBlock | Register block |
| SWTRIGR | DAC software trigger register (DAC_SWTRIGR) |